DLD |Gate-2011| Previous Year Questions| Set-10

Set-15 GATE-2006 DLD

DLD |Gate-2011| Digital Logic Design

1. The simplified SOP (sum of product) form of the boolean expression (P + Q’ + R’).(P + Q’ + R). (P + Q + R’) : [GATE – 2011]

a. (P’Q + R’)
b. (PQ’ + R’)
c. (P’Q + R)
d. P  + Q’R’

Answer : d)


2. The minimum number of D flip-flops needed to design a mod-258 counter is : [GATE – 2011]

a. 9
b. 8
c. 512
d. 258

Answer : a)


3. Which one of the following circuits is NOT equivalent to a 2-input XNOR (exclusive NOR) gate? [GATE – 2011]

a.

b.

c.

d.

Answer : d)


4. Consider the following circuit involving three D-type flip-flops used in a certail type of counter configuration.

 If all the flip-flops were reset to O at power on, what is the total number of distinct outputs *states) represented by PQR generated by the counter? [GATE – 2011]   

a. 3
b. 4
c. 5
d. 6

Answer : b)


5. Consider the following circuit involving three D-type flip-flops used in a certain type of counter configuration

 If at some instance prior to the occurrence of the clock edge, P, Q and R have a value 0, 1 and 0 respectively, what shall be the value of PQR after the clock edge? [GATE – 2011]

a. 001
b. 000
c. 010
d. 011

Answer : d)
DLD |Gate-2011|


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